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INTEGRATED CIRCUITS
DATA SHEET
TDA4821P Autosize IC for colour monitors
Product specification File under Integrated Circuits, IC02 2000 Feb 09
Philips Semiconductors
Product specification
Autosize IC for colour monitors
FEATURES * Measuring of six horizontal and four vertical timing parameters as follows: - Horizontal: sync width, sync period, video start, video end and horizontal flyback pulse start and end - Vertical: sync width, sync period, first line of video active and last line of video active. * Detection of H-sync and V-sync polarity * I2C-bus interface (maximum clock frequency 400 kHz) for read-out of data and write data of the internal clock multiplier using double byte (16-bit format) * Flexible digital clock input with built-in and (via I2C-bus) adjustable clock multiplier; internal clock is 48 MHz (typical value) * Horizontal measurements are expressed in number of clock pulses; precision is approximately 20 ns at 48 MHz and can be improved if external averaging methods are used * Vertical measurements are expressed in number of lines * Internal buffer keep I2C-bus registers stable between the V-sync pulses, allowing for asynchronous read-out. GENERAL DESCRIPTION The TDA4821P performs the `autosize' feature for colour monitors. The IC measures the timing of active H/V video with respect to the H-sync and V-sync pulses and also with respect to the horizontal flyback pulse in order to allow the microcontroller to adjust the display settings automatically, in particular parameters HSIZE, VSIZE, HPOS and VPOS. ORDERING INFORMATION TYPE NUMBER TDA4821P PACKAGE NAME DIP20 DESCRIPTION plastic dual in-line package; 20 leads (300 mil) The advantages are:
TDA4821P
* A more user friendly adjustment for any undefined video mode by simply pressing a button * Factory alignment for a reduced number of modes * Saving of EEPROM storage space for factory and user modes. The activation of the autosizing function can be done on user command or automatically on any mode change. When autosizing is activated while the screen is only partly active or consists of sub-windows, the picture size will increase, but not more than the range limits of the monitor allow.
VERSION SOT146-1
2000 Feb 09
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Philips Semiconductors
Product specification
Autosize IC for colour monitors
QUICK REFERENCE DATA Voltages measured with respect to pins VSS(I/O) and VSS(core). SYMBOL VDD(core) VDD(I/O) VDD(PLL) VVIN1 VVIN2 VVIN3 Vclamp(ref) Vslice fclk(ext) fclk(int) Mclk tres(h) PARAMETER core supply voltage (pin 15) I/O supply voltage (pin 6) PLL supply voltage (pin 3) video channel 1 input voltage (pin 1) video channel 2 input voltage (pin 2) video channel 3 input voltage (pin 19) default clamping level for video channel inputs (pins 1, 2 and 19) slicing voltage for video comparators external input clock frequency (pin 4) internal clock frequency clock multiplying factor time resolution for horizontal measurements I2C-bus serial clock frequency fclk(int) = fclk(ext) x Mclk adjustable via I2C-bus without external averaging methods; fclk(int) = 48 MHz AC-coupled with 10 nF AC-coupled with 10 nF AC-coupled with 10 nF internal default value CONDITIONS 3 3 3 0 0 0 360 450 4 18 1 - MIN. TYP. 3.3 3.3 3.3 - - - 400 500 - 48 - 20
TDA4821P
MAX. 3.6 3.6 3.6 V V V
UNIT
VDD - 0.5 V VDD - 0.5 V VDD - 0.5 V 440 550 16 72 8 - mV mV MHz MHz - ns
fSCL
-
-
400
kHz
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Philips Semiconductors
Product specification
Autosize IC for colour monitors
BLOCK DIAGRAM
TDA4821P
handbook, full pagewidth
R, G, B video inputs
VIN1 1 20 LEV VIDEO COMPARATORS VIN2 2 18 T1 VDD(PLL) 3 CLOCK PLL CLK 4 17 CLP video clamping pulse 19 VIN3
+3.3 V
TDA4821P
16 VSS(core) 15 VDD(core)
VSS(I/O) 5 14 T2 +3.3 V VDD(I/O) 6 DIGITAL CORE TEST MODES
+3.3 V
horizontal sync pulse
HS 7
HORIZONTAL POLARITY DETECTION
HORIZONTAL MEASUREMENT
vertical sync pulse
VS 8
VERTICAL POLARITY DETECTION
VERTICAL MEASUREMENT
VfstVid
VlstVid
HsWidth
Syncpol
Hperiod
VsWidth
HlstVid
Vperiod
HfstVid
Hfbstrt
+3.3 V POR 9 POWER-ON RESET
I2C-BUS REGISTERS Subaddr
Rddat
Wrdat
Wren
Hfbstop
13 SDA HFB 10 horizontal flyback pulse I2C-BUS INTERFACE 12 SCL
11 TC
MHB651
Fig.1 Block diagram.
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Philips Semiconductors
Product specification
Autosize IC for colour monitors
PINNING SYMBOL VIN1 VIN2 VDD(PLL) CLK VSS(I/O) VDD(I/O) HS VS POR HFB TC SCL SDA T2 VDD(core) VSS(core) CLP T1 VIN3 LEV PIN 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 DESCRIPTION video channel 1 input video channel 2 input analog supply voltage of PLL clock input ground of input/output circuit supply voltage of input/output circuit horizontal sync pulse input vertical sync pulse input Power-on reset input horizontal flyback pulse input test control input I2C-bus serial clock input I2C-bus serial data input/output test mode 2 input supply voltage of digital core and comparator ground of digital core video clamping pulse input test mode 1 input video channel 3 input video clamping level input FUNCTIONAL DESCRIPTION
TDA4821P
The TDA4821P consists of an RGB video comparator input stage (see Fig.1), a clock PLL for multiplying the external clock and a digital core which includes the comparators for H-sync, V-sync and H-flyback pulses, the polarity detection, the horizontal and vertical time measurement blocks, the I2C-bus registers and interface and the Power-on reset circuitry. RGB video input stage Three video input comparators are provided, suitable for AC-coupling with capacitors of approximately 10 nF on each input. The input pins VIN1, VIN2 and VIN3 are suitable for the RGB video signals. The three input signals are internally applied to an OR-circuit, so the presence of one video signal is sufficient to activate the capture registers. A positive pulse is needed on pin CLP for black level clamping. This clamping pulse must not coincide with a possible Sync-On-Green (SOG) because SOG will not be detected by this IC. The black level of the video signal on pins VIN1, VIN2 and VIN3 is clamped internally to 400 mV (typical value). This clamping level is determined by an internal divider which is available on pin LEV and can be adjusted by an additional external resistor divider connected to pin LEV (see Fig.5). A small HF decoupling capacitor is needed on pin LEV. The video slicing level for the detection of active video is 500 mV (typical value). This level is approximately 100 mV above the black level and is fixed by an additional internal resistor divider from the 3.3 V supply voltage; it cannot be modified. All signals which exceed this level are recognized as active video. The difference between the video slicing level and the clamping level is adjustable via pin LEV. Example: changing the voltage on pin LEV from 400 to 200 mV increases the threshold voltage for the detection of active video from 100 to 300 mV.
handbook, halfpage
VIN1 1 VIN2 2 VDD(PLL) 3 CLK 4 VSS(I/O) 5 VDD(I/O) 6 HS 7 VS 8 POR 9 HFB 10
MHB652
20 LEV 19 VIN3 18 T1 17 CLP 16 VSS(core)
TDA4821P
15 VDD(core) 14 T2 13 SDA 12 SCL 11 TC
Fig.2 Pin configuration.
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Philips Semiconductors
Product specification
Autosize IC for colour monitors
Clock PLL In order to measure the horizontal timing with sufficient precision, it is recommended to set the frequency of the internal reference clock to 48 MHz. This clock is generated by a multiplying PLL from the external clock signal applied to pin CLK. The ratio between the internal and external clock frequency (clock multiply factor is Mclk) is programmable from 1 to 8 (via the I2C-bus). For instance, for an external clock frequency of 8 MHz, a multiply factor Mclk = 6 is needed to achieve an internal reference clock of 48 MHz. After power-on of the IC and with an inactive I2C-bus, the default value of factor Mclk is set to 2. Sync and flyback pulse comparators and polarity detection The horizontal and vertical sync pulse input circuits on pins HS and VS are able to handle both 5 or 3.3 V level H/V sync pulses. The H-sync and V-sync signals are internally preprocessed by edge detectors which deliver positive pulses at the rising and falling edges of the input signals and are followed by auto-polarity correction stages. The polarity status of both sync signals will be detected and corrected and is available as the I2C-bus status bits Hpol and Vpol. A positive polarity means that the duty cycle is smaller than 50% (bit Hpol = 0 or bit Vpol = 0) and for a negative polarity the duty cycle is larger than 50%. The horizontal flyback pulse on pin HFB is internally preprocessed by an edge detector in the same way as for H-sync and V-sync pulses. The measurement of the position of the horizontal flyback pulse provides further information for the monitor microcontroller for a correct auto-adjustment of the picture within the scanned raster area.
TDA4821P
Horizontal and vertical timing measurements For each vertical period the IC performs six horizontal and four vertical measurements (see Figs 3 and 4). The leading edge of the next vertical sync pulse is used to transfer the previous measurement results to the I2C-bus data read registers and to reset the internal counters for the next full timing measurement cycle. In this way the I2C-bus data registers will always contain stable sample-and-hold data (assuming that the sync signals are stable) and they can be read-out via the I2C-bus by an external microcontroller for automatic adaption of the display geometry. Moreover, measuring the width of the sync pulses gives more advantages such as: * A better mode discrimination * In some cases the horizontal PLL of the deflection controllers operates on the leading edge of the sync pulse, in other cases in the middle of the sync pulse. VERTICAL TIMING MEASUREMENTS The parameters are measured with respect to the leading edge of the V-sync pulse (see Fig.3). At each leading edge of the V-sync pulse on pin VS a 12-bit counter is started. The four vertical timings (see Table 1) are counted as a number of H-sync pulses on pin HS and stored in buffer registers. The contents of these buffer registers are copied to the I2C-bus registers on every next V-sync pulse with the addition of LSBs (logic 0) for completing the full 2-byte data (see Table 4). The maximum line count is 4095. With Enhanced Graphics Adapter (EGA) systems with approximately 400 lines at 31.45 kHz, the lower line count will be 9 bits long only but the resolution is still better than 0.25%. No provisions are included for recognizing interlaced sync signals with or without equal vertical periods.
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Philips Semiconductors
Product specification
Autosize IC for colour monitors
Table 1 Vertical timing measurements BITS 8 12 12 12 trailing edge of pulse on pin VS first line with active video on pins VIN1, VIN2 or VIN3 last line with active video on pins VIN1, VIN2 or VIN3 next leading edge of pulse on pin VS CONDITIONS
TDA4821P
TIMING VsWidth VfstVid VlstVid Vperiod
handbook, full pagewidth
vertical sync (pin VS) VsWidth Vperiod R, G, B video inputs (pins VIN1, VIN2, VIN3) VfstVid VlstVid horizontal sync
MHB653
Fig.3 Vertical timing.
HORIZONTAL TIMING MEASUREMENTS The parameters are measured with respect to the leading edge of the H-sync pulses (see Fig.4). At the leading edge of the H-sync pulse on pin HS a 12-bit clock counter is started (nominal internal clock frequency is 48 MHz). The six horizontal timings (see Table 2) are countered as a number of internal clock pulses and stored in buffer registers. The contents of these buffer registers are copied to the I2C-bus data registers on every next leading edge of the V-sync pulse with the addition of LSBs (logic 0) for completing the full 2-byte data.
The measurements of HsWidth, Hperiod, Hfbstrt and Hfbstop in line 64 prevent wrong data capturing caused by post-equalizing sync pulses. The minimum horizontal frequency is 12 kHz and Hperiod displays the full 12 bits. At 125 kHz, the shorter Hperiod will display 9 bits only but the resolution is still better than 0.25%.
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Philips Semiconductors
Product specification
Autosize IC for colour monitors
Table 2 TIMING HsWidth Hperiod Hfbstrt Hfbstop HfstVid HlstVid Horizontal timing measurements BITS 8 12 12 12 12 12 CONDITIONS trailing edge of pulse on pin HS next leading edge of pulse on pin HS leading edge of pulse on pin HFB trailing edge of pulse on pin HFB first active video on pins VIN1, VIN2 or VIN3 last active video on pins VIN1, VIN2 or VIN3 in line 64 only in line 64 only in line 64 only in line 64 only
TDA4821P
REMARKS
in any line since last leading edge of pulse on pin VS in any line since last leading edge of pulse on pin VS
handbook, full pagewidth
horizontal sync (pin HS) HsWidth Hperiod
horizontal flyback pulse (pin HFB)
threshold level
Hfbstop Hfbstrt R, G, B video inputs (pins VIN1, VIN2, VIN3) HfstVid HlstVid reference clock
MHB654
Fig.4 Horizontal timing.
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Philips Semiconductors
Product specification
Autosize IC for colour monitors
EXAMPLE OF A MEASUREMENT On a 17-inch-screen the picture width is 320 mm. At a horizontal frequency of 70 kHz the active video is 11 s. Thus, with a measuring clock of 48 MHz, there are 528 clock pulses. The start and end of the video with respect to the leading edge of the H-sync pulse can both be measured with an accuracy of one clock pulse. On 320 screen one clock pulse corresponds to --------- = 0.6 mm. 528 An external microcontroller takes the measurements and after calculation the new settings will be downloaded to the deflection controller e.g. TDA4854, which has register steps corresponding to 0.4 mm on the screen. For this example, the positioning accuracy of the total auto-image concept will be in the range of: 0.6 + 0.4 = 1 mm. Since the clock is asynchronous, repeated measurements may show jumping between two values. If the external microcontroller takes the average of a few measurements, the final accuracy will be improved and, as a result, the total accuracy (measurement accuracy and register step size) will be improved too. OTHER SYNC PULSE CONDITIONS The IC needs both the H-sync and V-sync pulses on pins HS and VS respectively, for correct operation of the capture registers. The initial contents of the I2C-bus registers are random. At least two V-sync pulses (one full vertical period) together with the normal H-sync pulses are needed before the contents become valid. Without H-sync pulses (but with V-sync pulses) the register contents will be random. Without V-sync pulses (but with H-sync pulses) the register contents will be random too and the same will happen if both H-sync and V-sync pulses are missing, again the register contents will be random. In the event of the application of a composite sync signal to pin HS, the contents of the vertical capture registers may differ slightly from the actual line count, depending on the number of missing or additional H-sync pulses and/or equalizing pulses during the vertical blanking time. MISSING RGB VIDEO OR HORIZONTAL FLYBACK SIGNALS If the RGB video signals or the horizontal flyback signal are below the threshold level these signals cannot be detected (missing signals). In that event the video and flyback registers will have the default values (see Table 3). Table 3
TDA4821P
Register values for missing RGB video or horizontal flyback signals VALUE maximum: MSB = FF and LSB = F0 zero: MSB = 0 and LSB = 0 maximum: MSB = FF and LSB = F0 zero: MSB = 0 and LSB = 0 maximum: MSB = FF and LSB = F0 maximum: MSB = FF and LSB = F0
CONDITIONS REGISTER No R, G or B video signal VfstVid VlstVid HfstVid HlstVid No horizontal flyback signal Hfbstrt Hfbstop
I2C-bus interface and registers The I2C-bus device address is 0111 010X, which means 74H for write and 75H for read. The I2C-bus interface can handle standard I2C-bus features, including auto-increment in the read mode, so data byte by data byte can be read without sending a new subaddress each time. The interface can handle both 100 and 400 kHz I2C-bus standards. Pins SDA and SCL (5 V tolerable I/O) have digital filters, which remove all spikes smaller than 60 ns and the threshold levels on both pins are TTL compatible. The contents of timing measurements, sync pulse polarity and the clock multiplication factor are stored in 22 registers of 8-bit length (see Table 4). All read registers are double buffered and written simultaneously on the leading edge of the V-sync pulse. That means that the data is stable for one complete field.
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Philips Semiconductors
Product specification
Autosize IC for colour monitors
Table 4 I2C-bus registers and their contents SUBADDRESS REGISTER R/W HEX 00 01 02 03 04 05 06 07 08 09 0A 0B 0C 0D 0E 0F 10 11 12 13 14 20 Table 5 NAME VsWidth (MSB) VsWidth (LSB) VfstVid (MSB) VfstVid (LSB) VlstVid (MSB) VlstVid (LSB) Vperiod (MSB) Vperiod (LSB) HsWidth (MSB) HsWidth (LSB) HfstVid (MSB) HfstVid (LSB) HlstVid (MSB) HlstVid (LSB) Hperiod (MSB) Hperiod (LSB) Hfbstrt (MSB) Hfbstrt (LSB) Hfbstop (MSB) Hfbstop (LSB) Sync polarities Mclk FUNCTION V-sync width V-sync width start video after V-sync start video after V-sync stop video after V-sync stop video after V-sync V-sync cycle time V-sync cycle time H-sync width H-sync width start video after H-sync start video after H-sync stop video after H-sync stop video after V-sync H-sync cycle time H-sync cycle time start flyback after H-sync start flyback after H-sync stop flyback after H-sync stop flyback after H-sync sync polarities clock multiplier R R R R R R R R R R R R R R R R R R R R R W D7 b15 0 b15 b7 b15 b7 b15 b7 b15 0 b15 b7 b15 b7 b15 b7 b15 b7 b15 b7 0 0 D6 b14 0 b14 b6 b14 b6 b14 b6 b14 0 b14 b6 b14 b6 b14 b6 b14 b6 b14 b6 0 0 D5 b13 0 b13 b5 b13 b5 b13 b5 b13 0 b13 b5 b13 b5 b13 b5 b13 b5 b13 b5 0 0 D4 b12 0 b12 b4 b12 b4 b12 b4 b12 0 b12 b4 b12 b4 b12 b4 b12 b4 b12 b4 0 0 D3 b11 0 b11 0 b11 0 b11 0 b11 0 b11 0 b11 0 b11 0 b11 0 b11 0 0 0 MSB
TDA4821P
LSB D2 b10 0 b10 0 b10 0 b10 0 b10 0 b10 0 b10 0 b10 0 b10 0 b10 0 0 b2 D1 b9 0 b9 0 b9 0 b9 0 b9 0 b9 0 b9 0 b9 0 b9 0 b9 0 b1 D0 b8 0 b8 0 b8 0 b8 0 b8 0 b8 0 b8 0 b8 0 b8 0 b8 0 b0
Hpol Vpol
Description of the clock multiplier REGISTER Mclk CLOCK MULTIPLICATION FACTOR b2 0 0 0 1 1 1 1 0 b1 0 1 1 0 0 1 1 0 b0 1 0 1 0 1 0 1 0 1 2 (default after power-on) 3 4 5 6 7 8
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Philips Semiconductors
Product specification
Autosize IC for colour monitors
LIMITING VALUES In accordance with the Absolute Maximum Rating System (IEC 60134). SYMBOL VDD(core) VDD(I/O) VDD(PLL) Vi(n) PARAMETER core supply voltage I/O supply voltage PLL supply voltage input voltage: on pins HS, VS, SCL and SDA on all other I/O pins IDD(core) IDD(I/O) IDD(PLL) Io(SDA) Ptot Tstg Tamb Tj Ves core supply current I/O supply current PLL supply current output current on pin SDA total power dissipation storage temperature ambient temperature junction temperature electrostatic handling voltage note 1 note 2 Notes external load external load on pin SDA -0.5 -0.5 - - - - - -40 -20 -20 -250 -4000 CONDITIONS MIN. -0.5 -0.5 -0.5
TDA4821P
MAX. +4 +4 +4 +5.5 30 30 1 20 200 +125 +70 +125 +250 +4000 V V V V
UNIT
VDD + 0.5 V mA mA mA mA mW C C C V V
1. Machine model: equivalent to discharging a 200 pF capacitor through a 0 series resistor (`0 ' is actually 0.75 H + 10 ). 2. Human body model: equivalent to discharging a 100 pF capacitor through a 1500 series resistor. THERMAL CHARACTERISTICS SYMBOL Rth(j-a) PARAMETER CONDITIONS VALUE 80 UNIT K/W
thermal resistance from junction to ambient in free air
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Philips Semiconductors
Product specification
Autosize IC for colour monitors
TDA4821P
CHARACTERISTICS VDD = 3.3 V; Tamb = 25 C; voltages measured with respect to ground (pins VSS); unless otherwise specified. SYMBOL Supplies VDD(core) VDD(I/O) VDD(PLL) IDD(core) IDD(I/O) IDD(PLL) Ptot VVIN1 VVIN2 VVIN3 VCLP Vclamp(ref) core supply voltage (pin 15) I/O supply voltage (pin 6) PLL supply voltage (pin 3) core supply current (pin 15) I/O supply current (pin 6) PLL supply current (pin 3) total power dissipation fclk(int) = 48 MHz fclk(int) = 24 MHz no load on digital output pins 3 3 3 - - - - - AC-coupled with 10 nF AC-coupled with 10 nF AC-coupled with 10 nF 0 0 0 0 internal default value 360 3.3 3.3 3.3 10 6 - 400 - - - - - 400 3.6 3.6 3.6 14 8 300 800 100 V V V mA mA A A mW PARAMETER CONDITIONS MIN. TYP. MAX. UNIT
RGB input stage video channel 1 input voltage (pin 1) video channel 2 input voltage (pin 2) video channel 3 input voltage (pin 19) clamping active input voltage (pin 17) default clamping level for video channel inputs (pins 1, 2 and 19) VDD - 0.5 V VDD - 0.5 V VDD - 0.5 V VDD 440 V mV
Vclamp(video) clamping voltage range for video channel inputs (pins 1, 2 and 19) Vslice td(video) Iclamp ILI(video) Vclamp Vclamp(adj) CLEV(min) Vth(H) Vth(L) tW(clamp) slicing voltage for video comparators video comparator delay time clamping current video input leakage current clamping level voltage (pin 20) adjustable clamping level voltage range (pin 20) minimum capacitance at LEV (pin 20) clamping active threshold voltage (pin 17) clamping inactive threshold voltage (pin 17) clamping pulse width (pin 17)
externally adjustable range
100
400
440
mV
450 VVIN = Vslice + 30 mV Vclamp = 400 mV; clamp = HIGH clamp = LOW internal default value externally adjustable range - - - 380 0 1 rising edge (hysteresis input) falling edge (hysteresis input) 1.3 0.9
500 10 - - 400 - 10 - - -
550 25 10 1 420 420 - 1.9 1.35 -
mV ns mA A mV mV nF V V ns
video inputs AC-coupled 300 with 10 nF 12
2000 Feb 09
Philips Semiconductors
Product specification
Autosize IC for colour monitors
TDA4821P
SYMBOL Clock PLL fclk(ext) fclk(int) Mclk
PARAMETER
CONDITIONS
MIN. -
TYP.
MAX.
UNIT
external input clock frequency (pin 4) internal clock frequency clock multiplication factor fclk(int) = fclk(ext) x Mclk adjustable via I2C-bus default value after power-on; I2C-bus not active
4 18 1 -
24 72 8 -
MHz MHz - -
48 - 2
tres(h)
time resolution for horizontal measurements
without external averaging methods: fclk(int) = 48 MHz fclk(int) = 72 MHz - - 0 20 14 - - - VDD ns ns V
Vi(CLK)
input voltage on pin CLK (pin 4)
Digital inputs and outputs INPUT PINS HS, VS, POR AND HFB (PINS 7, 8, 9 AND 10) VIL VIH ILI Vi(9,10) Vi(7,8) tW LOW-level input voltage HIGH-level input voltage input leakage current input voltage on pins 9 and 10 input voltage on pins 7 and 8 pulse width of input signals on pins 7, 8 and 10 fclk(int) = 48 MHz - 2 - 0 0 100 - - - - - - 0.8 - 1 VDD 5.25 - V V A V V ns
I2C-BUS INPUT/OUTPUT PINS SCL AND SDA (PINS 12 AND 13) VIL VIH ILI VOL VOH Vi(12,13) Io(13) fSCL LOW-level input voltage HIGH-level input voltage input leakage current LOW-level output voltage HIGH-level output voltage input voltage on pins 12 and 13 output current on pin 13 I2C-bus serial clock frequency Io(13) = 3 mA Io(13) = -3 mA external pull-up resistor to 5 V supply external load - 2 - - 2.4 0 - - - - - - - - - - 0.8 - 1 0.4 - 5.25 3 400 V V A V V V mA kHz
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Philips Semiconductors
Product specification
Autosize IC for colour monitors
APPLICATION INFORMATION
TDA4821P
handbook, full pagewidth
27 10 nF optional for Vclamp(video) 400 mV +3.3 V
50 R, G, B video inputs 27 50 27 50 10
VIN1 1 10 nF VIDEO COMPARATORS VIN2 2 10 nF 18 T1 17 CLP 3.3 k 2.4 k CLOCK PLL video clamping pulse 20 LEV 19 VIN3 10 nF
+3.3 V external clock input optional if 5 V supply is available only +5 V 100 +3.3 V
VDD(PLL) 3 47 nF CLK 4 50 VSS(I/O) 5
TDA4821P
16 VSS(core) 15 VDD(core) 47 nF +3.3 V
10 F
14 T2 VDD(I/O) 6 DIGITAL CORE TEST MODES
+3.3 V HORIZONTAL MEASUREMENT
200 H-sync
HS 7
HORIZONTAL POLARITY DETECTION
200 V-sync necessary only if H-sync coincides with V-sync 150 pF
VS 8
VERTICAL POLARITY DETECTION
VERTICAL MEASUREMENT
HsWidth
Hperiod
VfstVid
VlstVid
Vperiod
Hfbstrt
VsWidth
270 nF +3.3 V 390 k +3.3 V Ch (1) Rh horizontal flyback pulse 200 1 k POR 9 POWER-ON RESET
Syncpol
I2C-BUS REGISTERS Subaddr
Rddat
Wrdat
Wren
Hfbstop
HfstVid
HlstVid
13 SDA HFB 10 I2C-BUS INTERFACE 12 SCL
100 100 I2C-bus interface
11 TC
MHB655
(1) Ch and Rh are application dependent.
Fig.5 Application diagram.
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Philips Semiconductors
Product specification
Autosize IC for colour monitors
PACKAGE OUTLINE DIP20: plastic dual in-line package; 20 leads (300 mil)
TDA4821P
SOT146-1
D seating plane
ME
A2
A
L
A1
c Z e b1 b 20 11 MH wM (e 1)
pin 1 index E
1
10
0
5 scale
10 mm
DIMENSIONS (inch dimensions are derived from the original mm dimensions) UNIT mm inches Note 1. Plastic or metal protrusions of 0.25 mm maximum per side are not included. OUTLINE VERSION SOT146-1 REFERENCES IEC JEDEC MS-001 EIAJ SC-603 EUROPEAN PROJECTION A max. 4.2 0.17 A1 min. 0.51 0.020 A2 max. 3.2 0.13 b 1.73 1.30 0.068 0.051 b1 0.53 0.38 0.021 0.015 c 0.36 0.23 0.014 0.009 D
(1)
E
(1)
e 2.54 0.10
e1 7.62 0.30
L 3.60 3.05 0.14 0.12
ME 8.25 7.80 0.32 0.31
MH 10.0 8.3 0.39 0.33
w 0.254 0.01
Z (1) max. 2.0 0.078
26.92 26.54 1.060 1.045
6.40 6.22 0.25 0.24
ISSUE DATE 95-05-24 99-12-27
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Philips Semiconductors
Product specification
Autosize IC for colour monitors
SOLDERING Introduction to soldering through-hole mount packages This text gives a brief insight to wave, dip and manual soldering. A more in-depth account of soldering ICs can be found in our "Data Handbook IC26; Integrated Circuit Packages" (document order number 9398 652 90011). Wave soldering is the preferred method for mounting of through-hole mount IC packages on a printed-circuit board. Soldering by dipping or by solder wave The maximum permissible temperature of the solder is 260 C; solder at this temperature must not be in contact with the joints for more than 5 seconds.
TDA4821P
The total contact time of successive solder waves must not exceed 5 seconds. The device may be mounted up to the seating plane, but the temperature of the plastic body must not exceed the specified maximum storage temperature (Tstg(max)). If the printed-circuit board has been pre-heated, forced cooling may be necessary immediately after soldering to keep the temperature within the permissible limit. Manual soldering Apply the soldering iron (24 V or less) to the lead(s) of the package, either below the seating plane or not more than 2 mm above it. If the temperature of the soldering iron bit is less than 300 C it may remain in contact for up to 10 seconds. If the bit temperature is between 300 and 400 C, contact may be up to 5 seconds.
Suitability of through-hole mount IC packages for dipping and wave soldering methods SOLDERING METHOD PACKAGE DIPPING DBS, DIP, HDIP, SDIP, SIL Note 1. For SDIP packages, the longitudinal axis must be parallel to the transport direction of the printed-circuit board. suitable suitable(1) WAVE
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Philips Semiconductors
Product specification
Autosize IC for colour monitors
DEFINITIONS Data sheet status Objective specification Preliminary specification Product specification Limiting values
TDA4821P
This data sheet contains target or goal specifications for product development. This data sheet contains preliminary data; supplementary data may be published later. This data sheet contains final product specifications.
Limiting values given are in accordance with the Absolute Maximum Rating System (IEC 134). Stress above one or more of the limiting values may cause permanent damage to the device. These are stress ratings only and operation of the device at these or at any other conditions above those given in the Characteristics sections of the specification is not implied. Exposure to limiting values for extended periods may affect device reliability. Application information Where application information is given, it is advisory and does not form part of the specification. LIFE SUPPORT APPLICATIONS These products are not designed for use in life support appliances, devices, or systems where malfunction of these products can reasonably be expected to result in personal injury. Philips customers using or selling these products for use in such applications do so at their own risk and agree to fully indemnify Philips for any damages resulting from such improper use or sale. PURCHASE OF PHILIPS I2C COMPONENTS
Purchase of Philips I2C components conveys a license under the Philips' I2C patent to use the components in the I2C system provided the system conforms to the I2C specification defined by Philips. This specification can be ordered using the code 9398 393 40011.
2000 Feb 09
17
Philips Semiconductors
Product specification
Autosize IC for colour monitors
NOTES
TDA4821P
2000 Feb 09
18
Philips Semiconductors
Product specification
Autosize IC for colour monitors
NOTES
TDA4821P
2000 Feb 09
19
Philips Semiconductors - a worldwide company
Argentina: see South America Australia: 3 Figtree Drive, HOMEBUSH, NSW 2140, Tel. +61 2 9704 8141, Fax. +61 2 9704 8139 Austria: Computerstr. 6, A-1101 WIEN, P.O. Box 213, Tel. +43 1 60 101 1248, Fax. +43 1 60 101 1210 Belarus: Hotel Minsk Business Center, Bld. 3, r. 1211, Volodarski Str. 6, 220050 MINSK, Tel. +375 172 20 0733, Fax. +375 172 20 0773 Belgium: see The Netherlands Brazil: see South America Bulgaria: Philips Bulgaria Ltd., Energoproject, 15th floor, 51 James Bourchier Blvd., 1407 SOFIA, Tel. +359 2 68 9211, Fax. +359 2 68 9102 Canada: PHILIPS SEMICONDUCTORS/COMPONENTS, Tel. +1 800 234 7381, Fax. +1 800 943 0087 China/Hong Kong: 501 Hong Kong Industrial Technology Centre, 72 Tat Chee Avenue, Kowloon Tong, HONG KONG, Tel. +852 2319 7888, Fax. +852 2319 7700 Colombia: see South America Czech Republic: see Austria Denmark: Sydhavnsgade 23, 1780 COPENHAGEN V, Tel. +45 33 29 3333, Fax. +45 33 29 3905 Finland: Sinikalliontie 3, FIN-02630 ESPOO, Tel. +358 9 615 800, Fax. +358 9 6158 0920 France: 51 Rue Carnot, BP317, 92156 SURESNES Cedex, Tel. +33 1 4099 6161, Fax. +33 1 4099 6427 Germany: Hammerbrookstrae 69, D-20097 HAMBURG, Tel. +49 40 2353 60, Fax. +49 40 2353 6300 Hungary: see Austria India: Philips INDIA Ltd, Band Box Building, 2nd floor, 254-D, Dr. Annie Besant Road, Worli, MUMBAI 400 025, Tel. +91 22 493 8541, Fax. +91 22 493 0966 Indonesia: PT Philips Development Corporation, Semiconductors Division, Gedung Philips, Jl. Buncit Raya Kav.99-100, JAKARTA 12510, Tel. +62 21 794 0040 ext. 2501, Fax. +62 21 794 0080 Ireland: Newstead, Clonskeagh, DUBLIN 14, Tel. +353 1 7640 000, Fax. +353 1 7640 200 Israel: RAPAC Electronics, 7 Kehilat Saloniki St, PO Box 18053, TEL AVIV 61180, Tel. +972 3 645 0444, Fax. +972 3 649 1007 Italy: PHILIPS SEMICONDUCTORS, Via Casati, 23 - 20052 MONZA (MI), Tel. +39 039 203 6838, Fax +39 039 203 6800 Japan: Philips Bldg 13-37, Kohnan 2-chome, Minato-ku, TOKYO 108-8507, Tel. +81 3 3740 5130, Fax. +81 3 3740 5057 Korea: Philips House, 260-199 Itaewon-dong, Yongsan-ku, SEOUL, Tel. +82 2 709 1412, Fax. +82 2 709 1415 Malaysia: No. 76 Jalan Universiti, 46200 PETALING JAYA, SELANGOR, Tel. +60 3 750 5214, Fax. +60 3 757 4880 Mexico: 5900 Gateway East, Suite 200, EL PASO, TEXAS 79905, Tel. +9-5 800 234 7381, Fax +9-5 800 943 0087 Middle East: see Italy Netherlands: Postbus 90050, 5600 PB EINDHOVEN, Bldg. VB, Tel. +31 40 27 82785, Fax. +31 40 27 88399 New Zealand: 2 Wagener Place, C.P.O. Box 1041, AUCKLAND, Tel. +64 9 849 4160, Fax. +64 9 849 7811 Norway: Box 1, Manglerud 0612, OSLO, Tel. +47 22 74 8000, Fax. +47 22 74 8341 Pakistan: see Singapore Philippines: Philips Semiconductors Philippines Inc., 106 Valero St. Salcedo Village, P.O. Box 2108 MCC, MAKATI, Metro MANILA, Tel. +63 2 816 6380, Fax. +63 2 817 3474 Poland: Al.Jerozolimskie 195 B, 02-222 WARSAW, Tel. +48 22 5710 000, Fax. +48 22 5710 001 Portugal: see Spain Romania: see Italy Russia: Philips Russia, Ul. Usatcheva 35A, 119048 MOSCOW, Tel. +7 095 755 6918, Fax. +7 095 755 6919 Singapore: Lorong 1, Toa Payoh, SINGAPORE 319762, Tel. +65 350 2538, Fax. +65 251 6500 Slovakia: see Austria Slovenia: see Italy South Africa: S.A. PHILIPS Pty Ltd., 195-215 Main Road Martindale, 2092 JOHANNESBURG, P.O. Box 58088 Newville 2114, Tel. +27 11 471 5401, Fax. +27 11 471 5398 South America: Al. Vicente Pinzon, 173, 6th floor, 04547-130 SAO PAULO, SP, Brazil, Tel. +55 11 821 2333, Fax. +55 11 821 2382 Spain: Balmes 22, 08007 BARCELONA, Tel. +34 93 301 6312, Fax. +34 93 301 4107 Sweden: Kottbygatan 7, Akalla, S-16485 STOCKHOLM, Tel. +46 8 5985 2000, Fax. +46 8 5985 2745 Switzerland: Allmendstrasse 140, CH-8027 ZURICH, Tel. +41 1 488 2741 Fax. +41 1 488 3263 Taiwan: Philips Semiconductors, 6F, No. 96, Chien Kuo N. Rd., Sec. 1, TAIPEI, Taiwan Tel. +886 2 2134 2886, Fax. +886 2 2134 2874 Thailand: PHILIPS ELECTRONICS (THAILAND) Ltd., 209/2 Sanpavuth-Bangna Road Prakanong, BANGKOK 10260, Tel. +66 2 745 4090, Fax. +66 2 398 0793 Turkey: Yukari Dudullu, Org. San. Blg., 2.Cad. Nr. 28 81260 Umraniye, ISTANBUL, Tel. +90 216 522 1500, Fax. +90 216 522 1813 Ukraine: PHILIPS UKRAINE, 4 Patrice Lumumba str., Building B, Floor 7, 252042 KIEV, Tel. +380 44 264 2776, Fax. +380 44 268 0461 United Kingdom: Philips Semiconductors Ltd., 276 Bath Road, Hayes, MIDDLESEX UB3 5BX, Tel. +44 208 730 5000, Fax. +44 208 754 8421 United States: 811 East Arques Avenue, SUNNYVALE, CA 94088-3409, Tel. +1 800 234 7381, Fax. +1 800 943 0087 Uruguay: see South America Vietnam: see Singapore Yugoslavia: PHILIPS, Trg N. Pasica 5/v, 11000 BEOGRAD, Tel. +381 11 3341 299, Fax.+381 11 3342 553
For all other countries apply to: Philips Semiconductors, International Marketing & Sales Communications, Building BE-p, P.O. Box 218, 5600 MD EINDHOVEN, The Netherlands, Fax. +31 40 27 24825 (c) Philips Electronics N.V. 2000
Internet: http://www.semiconductors.philips.com
SCA 69
All rights are reserved. Reproduction in whole or in part is prohibited without the prior written consent of the copyright owner. The information presented in this document does not form part of any quotation or contract, is believed to be accurate and reliable and may be changed without notice. No liability will be accepted by the publisher for any consequence of its use. Publication thereof does not convey nor imply any license under patent- or other industrial or intellectual property rights.
Printed in The Netherlands
753504/01/pp20
Date of release: 2000
Feb 09
Document order number:
9397 750 06572

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